Staff Engineer Photolithography

Overview

Staff-level photolithography engineer supporting memory device scribe challenges, including optical simulation, mark design and project leadership for current and future memory and storage nodes.

What you'll do

• Model and simulate optical behavior related to scribe marks.
• Provide mark design recommendations.
• Identify root causes of sophisticated photolithography problems.
• Provide simulation training for other photolithography engineers.
• Define and lead projects addressing photolithography performance gaps on current and future memory and storage nodes.
• Understand technology challenges with respect to overlay and establish project plans for the N, N+1 and N+2 nodes.
• Work with vendor applications teams to find areas for overlay scribe improvement.
• Drive technical innovation as a recognized Micron expert in your field.
• Standardize methods and procedures across areas, departments and/or FABs.
• Define and lead sophisticated, multi-disciplinary projects essential to Micron's photolithography roadmap.
• Help craft strategic decisions.
• Work with process development engineers on photolithography issues and projects.
• Summarize plans, experimental progress and conclusions in written reports.
• Provide advice and counsel to senior management on technical overlay scribe issues.
• Build strong customer relationships to understand customer expectations.
• Integrate AI-assisted tools and insights into daily work to improve efficiency, quality or effectiveness, complying with organizational standards and legal requirements.
• Contribute to continuous improvement by identifying, testing and sharing AI-enabled enhancements within one's scope of work.

What you'll need

• Strong understanding of photolithography.
• Understanding of optics.
• Understanding of the principles of photolithography and optical metrology.
• Understanding of how lens aberrations, scanner chuck differences and process variations can affect overlay.
• Understanding of various alignment and overlay marks.
• Understanding of how mark type and design can impact overlay errors.
• Ability to develop and maintain relationships with multi-functional teams and suppliers.
• Strong curiosity about research and development and ability to build production-worthy technologies.
• Strong communication skills (written, verbal and presentation).
• Baseline digital fluency and role-appropriate AI literacy to use AI-enabled tools responsibly and effectively for research, analysis, content creation, problem-solving, operational tasks and achieving business outcomes.
• Education: M.S./Ph.D. in Engineering, Physics or relevant area of study with 3 years semiconductor lithography experience, or B.S. in Engineering with 5 years semiconductor processing experience with emphasis on Lithography (will be considered).

Nice to have

• Familiarity with semiconductor process integration.
• Experience with overlay mark simulation software.

Details

• Location: Hyderabad - Phoenix Aquila, India.