Staff Engineer, CAD PD/STA

Overview

Staff Engineer responsible for developing and supporting physical design, place-and-route, static timing analysis, and automation flows for CMOS and DRAM designs. The role also applies AI-assisted workflows to placement, routing, optimization, floorplanning, and parasitic estimation.

What you'll do

• Develop place-and-route flows for DRAM designs at advanced process technology nodes.
• Implement hierarchical, UPF, and process-specific flow customizations.
• Deploy PnR tools with EDA vendors and track issues through resolution.
• Customize EDA tools and create in-house flows to improve design-team efficiency.
• Support global design teams across PnR flows and methodologies.
• Lead AI-assisted and automated workflows for placement, routing, and optimization.
• Develop AI-enabled methodologies for semi-automated floorplanning and parasitic estimation.

What you'll need

• Bachelor's degree in Electronics, Electrical, or Computer Engineering with 5+ years of experience.
• Alternatively, a master's degree in these fields with 4+ years of experience.
• Hands-on experience with ICC2, Innovus, and PrimeTime.
• Knowledge of STA constraints, timing corners, margins, and signoff requirements.
• Experience with critical timing ECO, power closure ECO, and metal ECO at SOC level.
• Strong UNIX and scripting skills in TCL, Perl, Shell, or Python.
• Excellent communication and problem-solving skills.

Nice to have

• Tape-out experience at advanced technology nodes.
• Familiarity with Perl and Python.

Details

• Location: Hyderabad, India.