Staff Engineer – SOC Design Verification

Overview

Staff Engineer role focused on SoC Design Verification.

What you'll do

• Develop verification environments and testbenches for SoC, subsystem, and IP/core levels.
• Create and debug assertions and apply verification methodologies.
• Verify complex SoCs and subsystems and address system-level verification challenges.
• Work with verification using industry-standard protocols and interface systems.
• Perform testbench architecture, test development, and test plan creation.
• Use automation and productivity scripting and perform waveform debugging and root-cause analysis.

What you'll need

• 7 to 10 years of hands-on experience in SoC Design Verification.
• Proficiency in Verilog and System-Verilog.
• Experience with UVM and SVA.
• Experience developing SoC-level testbenches, tests, and plans.
• Knowledge of SoC architectures and boot flows.
• Hands-on experience with industry-standard protocols/interfaces including PCIe, USB, and LPDDR.

Details

• Location: Noida, Uttar Pradesh, India.