Static Timing Analysis Engineer

Overview

As a Physical Design Timing Engineer, perform timing analysis and optimization for next-generation SoCs at chip and block levels, delivering timing models for the physical design team.

What you'll do

• Perform timing analysis and optimization to ensure design functionality and performance at the chip and block levels.
• Generate and verify timing constraints, addressing and resolving timing violations during SoC development.
• Conduct timing rollups.
• Develop and implement power-optimized clock networks aligned with high-performance, low-power guidelines.
• Define and implement methodologies to deliver quality timing models that enhance the efficiency of the physical design process.
• Set process, voltage, and temperature (PVT) conditions for timing analysis based on product plans and operating conditions.
• Collaborate with architecture, clock design, logic design, and backend teams to achieve clocking balance, power delivery optimization, and efficient partitioning.
• Partner closely with the clocking team to refine methodologies and validate integration flows for chip-level timing solutions.

What you'll need

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• 8+ years of experience in Physical Design with a Bachelor's degree, 6+ years with a Master's degree, or 4+ years with a PhD.
• Proficiency in static timing analysis tools and methodologies.
• Demonstrated expertise in timing modeling, verification, constraint generation, and optimization techniques.
• Technical understanding of PVT conditions and their application in timing analysis.

Nice to have

• Advanced knowledge of SoC development, clocking design principles, and timing methodologies.
• Strong collaboration skills, with a proven ability to work across architecture, logic design, and physical design teams.
• Experience in high-performance computing or low-power design environments.
• Commitment to continuous learning and staying updated on industry advancements.

Details

• Location: Bangalore, India.
• Shift: Shift 1 (India).
• Hybrid work model, allowing employees to split their time between working on-site at their assigned Intel site and off-site.
• Job type: Experienced Hire.