Synthesis- Lead /Staff Engineer

Overview

Lead/Staff Engineer role focused on synthesis and low-power implementation bring-up for complex SoCs.

What you'll do

• Own synthesis and low power implementation bring-up for power complex SoCs.
• Use physical- and power-aware synthesis techniques for multi-voltage designs.
• Collaborate with design teams on pre-layout timing challenges and constraint feedback.
• Perform pre- and post-layout netlist low power qualification at SoC and subsystem levels.
• Collaborate with DFT teams for enabling MBIST and DFT scan insertion.
• Work with physical design (PD) teams on low power implementation issues and fixes.
• Use scripting languages such as TCL, Perl, Python, and shell.

What you'll need

• Have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of hardware engineering experience (or equivalent master/PhD combinations as stated).
• Be knowledgeable about physical and power-aware synthesis techniques.
• Be fluent with multi-voltage designs.
• Be able to balance power, performance, area, and verification priority approaches at synthesis.
• Be proficient with pre- and post-layout netlist low power qualification for SoC and subsystem levels.

Nice to have

• Good knowledge of design data management aspects such as perforce and clearcase.
• Logical equivalence checks between RTL to netlist and netlist to netlist.
• Knowledgeable about lower tech node timing derating.
• Mentor junior engineers in timing flows and methodologies.

Details

• Location: Chennai, Tamil Nādu, India.