Technical Staff - Design Engineering

Overview

Serve as a Technical Staff Engineer in the Communications Business Unit Product Development team, responsible for the architecture and technical leadership of communication semiconductor devices and subsystems. Directly contribute to block- and top-level design, solve engineering problems, and mentor engineers through the device R&D lifecycle.

What you'll do

• Own or contribute to the architecture of leading-edge communications devices.
• Develop or enhance system-level understanding of device applications.
• Collaborate with Product Marketing, Applications Engineers, vendors, and customers to identify, record, and track device requirements.
• Design datapaths and partition functions, often employing complex, channelized techniques.
• Participate in concept and feasibility studies for next-generation products and ways to leverage expertise into new domains.
• Deliver digital integrated circuits at the device, subsystem, or block level as an architect, designer, or team leader.
• Supervise and mentor a small team of Design Engineers.
• Partner with a dedicated Verification Lead to deliver high-confidence designs.
• Design digital circuits based on industry standards and market requirements.
• Implement designs in SystemVerilog RTL code utilizing low-power design principles.
• Interact with dedicated Synthesis and Physical Design/Layout teams and ensure quality of results.
• Develop or enhance technical expertise in technologies, flows, or standards.
• Contribute to industry standards through submissions and participation in Study Groups across data-center, automotive, and other segments.
• Provide subject-matter guidance to Development Teams within the Communications Business Unit.
• Enhance internal, proprietary flows and practices to improve efficiency and accuracy.
• Collaborate with Software, Validation, and Production Engineers to deliver production-worthy devices that integrate into a wider system.
• Communicate with relevant parties regularly and effectively.

What you'll need

• Bachelor’s or Master’s Degree in Electrical Engineering or Computer Engineering.
• 12+ years related experience.
• Excellent analytical and debugging skills and the ability to proactively solve issues.
• Strong expertise in SystemVerilog RTL design and micro-architecture development.
• Deep hands-on experience with Lint, CDC, formal verification, logic synthesis, and static timing analysis.
• Strong understanding of physical design interactions, including timing, power, and congestion considerations.
• Solid experience with low-power design methodologies and flows.
• In-depth knowledge of DFT, including scan, testability considerations, and DFT sign-off interactions.
• Proficiency in scripting languages such as Tcl, Perl, and/or Awk.

Nice to have

• Experience with Synopsys or Cadence tool flows for synthesis, verification, or STA.
• Experience with 28nm and smaller silicon process technologies.

Details

• Location: Bangalore, India.
• Travel time: 0%–25%.