WRD(RTL ) Design - Staff/Manager

Overview

Digital design engineer for BDC WRD (Wi‑Fi) working on RTL design, validation, and release of a Wi‑Fi PHY IP for an upcoming standard. Collaborates with the lead during requirements and contributes across the full design lifecycle.

What you'll do

• Design one of the Wi‑Fi PHY IPs including spec understanding, micro-architecture, RTL coding, RTL QA, and making releases.
• Implement signal processing modules of Wi‑Fi in RTL and/or HLS.
• Develop timing constraints for RTL synthesis (if required).
• Support linting and CDC rule validation as part of RTL development and validation.
• Collaborate with the Wi‑Fi PHY systems team during the requirements phase.
• Work with functional verification on test-plan development and debug.

What you'll need

• MTech/BTech in Electronics & Communication with 8–15 years of experience in design, micro-architecture, and RTL coding.
• Proficiency in Verilog and System-Verilog programming languages.
• Solid experience with RTL QA flows like PLDRC and CDC (CLP optional).
• Background in signal processing concepts/algorithms and Wi‑Fi standards (noted as good to have).
• Strong debugging and problem-solving skills.
• Minimum qualification options include a Bachelor’s degree with 6+ years, or Master’s with 5+ years, or PhD with 4+ years of relevant hardware engineering experience.

Details

• Location: Bangalore, India.