Analog Layout Intern

Overview

Analog Layout Intern in Marvell's Central Engineering group, working in a small analog team that provides IP to Marvell's Storage, Security and Networking businesses.

What you'll do

• Learn the use of the different IC layout development CAD and physical verification tools.
• Train on mask/layout design using Cadence Virtuoso EXL, using circuit design as input.
• Develop layouts and deliver Foundational IP and analog layout for SoCs and test chips.
• Work with a team and collaborate effectively with people for effective outcomes.
• Explore, collaborate and connect theory to hands-on experience.

What you'll need

• Currently pursuing a BE/MTech degree in CS/EE/EC/Microelectronics or a related technical field.
• Excellent written and verbal communication skills.
• Good knowledge of CMOS process and fabrication.
• Strong digital fundamentals: latches, flip-flops and combinatorial logic.
• Good understanding of circuit elements such as diode, transistor, capacitor and resistor.
• Electrical network analysis using different theorems.
• Basics of scripting knowledge.
• Basic knowledge of IC layout editor tools.

Nice to have

• BE/MTech degree preferred.

Details

• Location: Bangalore.