ASIC Verification Engineer - Clocks

Overview

Senior ASIC Verification Engineer (Clocks) to validate clocking and reset logic for Tegra automotive and datacenter ASICs.

What you'll do

• Own end-to-end validation of clocking structures, including test plan development.
• Develop validation flows, coverage metrics, and execute tests.
• Identify bugs, support fixes, and work toward productization.
• Build scalable verification solutions across platforms.
• Partner with clocks/reset architecture and design teams to validate designs.
• Coordinate with internal and external teams across time zones.

What you'll need

• BS/MS in EE/ECE or equivalent experience.
• 2+ years of relevant industry work experience.
• Good understanding of logic design and architecture.
• Expertise in verification flows such as UVM, SV constraint-random, formal verification, and coverage metrics.
• Coding skills in SystemVerilog, Perl/Python scripting, and C++.
• Exposure to block-level and system-level verification.
• Experience implementing test plans for pre-silicon platforms.

Details

• Location: Bengaluru, India.
• Work mode: Hybrid (#LI-Hybrid).