CPU EMIR CAD Engineer

Overview

Work as a CPU EMIR CAD Engineer supporting power integrity analysis, EMIR flows, and CAD solutions for large and complex SoC design implementation and analysis work.

What you'll do

• Support and enhance static IR, dynamic IR, and electromigration flows at the block-level and subsystem levels.
• Provide guidance and feedback to PDN analysis engineers on EMIR best practices, rules, and methodologies.
• Troubleshoot and debug EMIR issues and provide solutions to improve accuracy and efficiency.
• Develop, support, and enhance scripts that postprocess EMIR results to dashboards and summarize actionable results for the design team.
• Maintain and release qualified flow releases for large and complex SoC design implementation and analysis work.
• Maximize design productivity with Python, Tcl, and Perl scripting skills and customization of tool flows.
• Qualify EMIR tools with regression management systems and create tests.
• Engage with EDA vendors to provide cutting-edge out-of-box solutions for new features and flows.
• Collaborate with EDA partners to determine and drive optimal and cutting-edge solutions for effective and efficient CAD solutions.

What you'll need

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience, or Master's degree in the same fields and 5+ years of Hardware Engineering or related work experience, or PhD in the same fields and 4+ years of Hardware Engineering or related work experience.
• 6 to 15 years of experience in the EM/IR and PDN domain.
• Expert user of Synopsys Redhawk-SC or Cadence Voltus power integrity analysis tools.
• Exposure to PNR/STA and extraction industry-standard tools and flows.
• Strong and efficient Python, Tcl, and Perl scripting skills.

Details

• Location: Bangalore, India, and Noida, Uttar Pradesh, India.