Design Engineer, Senior Staff/Manager

Overview

Design and verify digital IP and SoC microarchitecture for high-performance, low-power products as an ASIC engineer, collaborating with cross-functional groups to determine the product execution path.

What you'll do

• Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development.
• Collaborate with cross-functional groups to determine product execution path.

What you'll need

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience, OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience, OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• RTL design engineer with 12+ years of experience.
• Digital IP architecture and SoC microarchitecture experience.
• Clock and reset experience.
• Interconnect bus protocols: AHB, AXI.
• SoC integration, PLDRC, CDC.
• Experience with large-scale SoC integration aspects.

Details

• Location: Noida, Uttar Pradesh, India.
• Employment type and work mode are not stated.