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Digital IP Design - Senior Lead Engineer

NXP Semiconductors
NewPosted today

LOCATION

Noida · Onsite

EXPERIENCE

7 - 13 Years

TYPE

FullTime

SKILLS REQUIRED

VerilogProtocol DesignTiming ClosureFunctional VerificationVHDLDigital Signal ProcessingPCIe

Job description

Overview

Individual Contributor role to architect, design and develop complex IPs and subsystems for automotive ADAS (vision and radar), in-vehicle networks, gateway systems and fail-safe (ASIL-D) subsystems, from high-level specification through to implementation.

What you'll do

  • Architect and design complex IP and subsystems across a range of protocols required for automotive self-driving vehicles (ADAS), both vision and radar, in-vehicle networks, gateway systems, and fail-safe (ASIL-D) subsystems.
  • Own and lead IP / subsystem development from concept through IP design and development, achieving final design performance in the integrated system within aggressive, market-driven schedules.
  • Ensure quality adherence during all stages of the IP development cycle, analyze existing processes, and recommend and implement process improvements to ensure 'Zero Defect' designs.
  • Work as part of a team of global and local experts to influence and build technological innovations.
  • Work on testbench and testplan development closely with the verification team.

What you'll need

  • 7-13 years of experience to architect and design complex IP / sub-system with minimal supervision.
  • Custom processor designs with key DSP functions like those needed for vision and radar processing.
  • Experience in high-speed serial protocols and associated high-speed challenges on controller and PHY for PCIe, USB and MIPI CSI / DSI.
  • Understanding of key external memory interface protocols including DDR4 / LPDDR4, and QuadSPI flash interfaces.
  • Experience in microcontroller architecture, cache, and protocols like AHB/AMBA AXI.
  • Extensive hands-on knowledge of HDLs (Verilog/VHDL), scripting languages (Perl, Tcl), and C/C++ for hardware modeling.
  • Understanding of end-to-end IP development flow including complex CDC and RDC constructs, IP synthesis, and DFT ATPG coverage.
  • Proficient written and verbal communication skills; can articulate well.
  • Sense of ownership; engages everyone with trust and respect.
  • Emotional intelligence and leadership values, with ability to work well as part of a team, local, remote or multisite.

Nice to have

  • Experience in automotive protocols such as LIN, CAN, FlexRay.
  • Addressing testability aspects of the IP / subsystem along with functional requirements.
  • Hands-on work on pre-silicon validation using FPGA / emulation boards.

Details

  • Location: Noida, India.

Read the full description and apply on the company’s own careers page.

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Digital IP Design - Senior Lead Engineer