GPU Core Pipeline IP Verification Engineer

Overview

Verification Engineer for GPU ASIC IP-level verification within NVIDIA’s ASIC Verification team. Focuses on verifying graphics and compute features, RTL functional correctness, and coverage using advanced verification tools.

What you'll do

• Verify graphics and compute features within an IP.
• Perform IP-level verification of GPU ASICs across design, architecture, golden models, and micro-architecture.
• Use specifications to ensure functional and code coverage of the RTL being verified.
• Define verification scope, develop verification infrastructure, and verify design correctness.
• Collaborate with HW architects and designers on implementation choices.

What you'll need

• Requires B.Tech./M.Tech. with 1+ years of relevant experience.
• Familiarity with Verilog and C++ and OOP concepts.
• Hands-on verification experience at Unit/Sub-system/SOC level.
• Background with verification/design tools including VCS (or equivalent) and debug tools like Debussy and GDB.
• Good understanding of computer architecture concepts.
• Knowledge of SystemVerilog or similar HVL.

Details

• Location: Bengaluru, India.
• Work mode: Hybrid (#LI-Hybrid).