Physical Design Engineer

Overview

Physical Design Engineer role focused on implementing RTL-to-GDS workflows for custom IP and SoC designs, creating manufacturing-ready design databases for Intel products and Intel Custom ASIC customers.

What you'll do

• Perform physical design implementation from RTL to GDS for custom IP and SoC.
• Run physical design flow activities including synthesis, place and route, and clock tree synthesis.
• Handle floor planning, static timing analysis, and power/clock distribution.
• Conduct verification and signoff such as formal equivalence verification and reliability verification.
• Analyze physical design results and recommend fixes for violations.
• Optimize for power, frequency, and area (PPA), and support flow automation and methodology improvement.

What you'll need

• 5+ years of Physical Design execution with a Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
• 3+ years of Physical Design execution with a Master's degree.
• Deep knowledge of RTL-to-GDS workflows including synthesis, place and route, and static timing analysis.
• Expertise in PPA optimization techniques.
• Hands-on experience with industry-standard EDA tools for physical design and verification.
• Knowledge of clock tree synthesis and low-power design techniques.

Details

• Primary location: India, Bangalore.
• Work model: Hybrid (on-site at assigned Intel site and off-site).
• Shift: Shift 1 (India).