Power Engineer

Overview

Power Engineer role focused on defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for low-power, high-quality products.

What you'll do

• Define and model IP development activities for block/SoC systems.
• Design digital and/or analog components for high performance and low power.
• Optimize, verify, and validate RTL power and related design outcomes.
• Implement and document IP development for methodologies and best practices.
• Collaborate with cross-functional groups to determine product execution path.
• Debug RTL or gate-level power anomalies and identify root-cause structures.

What you'll need

• Have a Bachelor's degree in Science, Engineering, or a related field.
• Have 2+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or a Master's degree.
• Understand RTL power optimization fundamentals (switching activity, clock/enable efficiency, low-power RTL patterns).
• Be familiar with RTL power analysis and optimization tools such as PowerArtist, PTPX, PowerPro, or equivalents.
• Understand low-power design techniques including clock gating and power gating, and dynamic vs. leakage tradeoffs.
• Have backend flow knowledge such as logic synthesis and place-and-route, and how RTL affects post-layout power/timing.

Details

• Location: Noida, Uttar Pradesh, India.