Staff Engineer- Power Engineer

Overview

Develop and optimize RTL and ASIC power solutions for high-performance, low-power IP, block, and SoC products.

What you'll do

• Define, model, design, verify, validate, and implement ASIC IP, blocks, and SoCs.
• Optimize RTL power using switching activity and clock or enable efficiency analysis.
• Analyze and optimize RTL power with PowerArtist, PTPX, PowerPro, or equivalent tools.
• Debug RTL and gate-level power anomalies and identify root causes.
• Build Python automation, data pipelines, and AI/ML-driven RTL power analysis flows.
• Collaborate with cross-functional groups on product execution.

What you'll need

• 8–12 years of experience with a bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field, or a master's degree.
• Knowledge of RTL power optimization fundamentals and low-power design patterns.
• Knowledge of clock gating, power gating, and dynamic versus leakage power tradeoffs.
• Knowledge of emulation power flow and methodology.
• Knowledge of logic synthesis and place-and-route backend flows.
• Strong Python programming, debugging, analytical, communication, and collaboration skills.

Details

• Location: Noida, Uttar Pradesh, India