Senior DDR & Execution Validation Engineer

Overview

Senior DDR & Execution Validation Engineer focused on bring-up, validation, characterization, and debug of DDR and HBM memory subsystems for next-generation AI compute platforms.

What you'll do

• Execute DDR/HBM memory bring-up and validation activities.
• Verify memory bring-up software, firmware, and scripts against project requirements.
• Debug firmware, hardware, and system-level issues and support root-cause analysis.
• Analyze system logs and validation/characterization data to find failures and performance issues.
• Run PHY characterization and analog-level analysis during stress testing.
• Develop and execute functional, stress, performance, and corner-case tests.
• Build Python-based automation and reporting tools for validation efficiency.

What you'll need

• Strong experience validating DDR/LPDDR/HBM or related DRAM technologies.
• Deep understanding of DRAM architecture, memory subsystem operation, and memory controller functionality.
• Experience developing firmware/BIOS/Embedded C.
• Strong programming skills in C and Python.
• Hands-on use of laboratory equipment (e.g., oscilloscopes).
• Experience interfacing with GPIO, SPI, I2C, and UART/serial interfaces.
• Experience debugging complex hardware/firmware/system issues.

Details

• Location: Bengaluru, India