Senior IO ESD Engineer

Overview

Analog IC Design Engineer in Marvell's Central Engineering business group, building and improving transistor-level circuits for IP used across Marvell's product lines.

What you'll do

• Build transistor-level circuits from scratch or improve and port existing blocks, using CAD tools, primarily Cadence.
• Simulate circuit performance metrics and measure other parameters.
• Perform circuit analysis and send acceptable circuits to layout for physical design.
• Review post-layout results, run simulations and tests, and iterate until the circuit performs as required.
• Attend weekly team meetings to discuss projects and take a focused look at issues as they arise.
• Attend meetings with senior designers and managers to review work in detail.

Details

• Location: Bangalore.
• Work mode: hybrid, remote or in-office (as stated for the role).
• Eligible for Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers.
• 2026 intern conversion to FTE.