Staff DFT Engineer

Overview

Staff-level DFT Engineer for EnCharge AI’s silicon team, owning end-to-end DFT insertion for next-generation AI accelerators in an edge-to-cloud/edge AI context.

What you'll do

• Define and implement the DFT architecture, including Scan, MBIST, BSCAN, and Boundary Scan.
• Develop and manage DFT constraints and coordinate integration with synthesis and STA teams.
• Generate high-coverage test patterns (stuck-at, at-speed, transition, path delay) and verify via timing-annotated simulations.
• Implement edge AI–specific DFT optimizations such as high-bandwidth memory testing and low-power test modes.
• Design and execute hierarchical DFT flows for large-scale AI SoCs.
• Work with ATE teams to debug silicon test patterns and drive yield improvement initiatives.

What you'll need

• 9–10 years of hands-on DFT experience, preferably with at least one full tape-out cycle in a lead or staff capacity.
• Expert proficiency with tools such as Siemens Tessent, Synopsys DFTMAX/TetraMAX, or Cadence Genus/Modus.
• Deep understanding of DFT-centric STA, power-aware DFT, and high-speed IO testing.
• Experience with DFT constraints and SDC management, including post-layout STA.
• Ability to script in Tcl, Python, or Perl for flow automation.

Details

• Location: Hybrid via Bangalore or Remote across India.