Staff Engineer, Analog Design

Overview

Staff Engineer role in analog design focused on analog and mixed-signal circuits for NAND Flash, spanning architecture, design, simulation, validation and AI-assisted engineering tools.

What you'll do

• Architect, design, implement and validate analog and mixed-signal circuits used in NAND Flash across the complete design lifecycle.
• Design and develop circuits such as charge pumps, amplifiers, voltage regulators, data converters (ADC/DAC), bandgap references, sensor interfaces and power-management blocks.
• Translate system-level requirements into detailed circuit specifications, architectures, schematics, verification plans and design documentation.
• Perform transistor-level design and optimization to meet performance, power, area, noise and reliability targets.
• Conduct DC, AC, transient, noise, Monte Carlo and corner simulations to verify functionality and robustness across process, voltage and temperature variations.
• Validate block- and chip-level design performance using standard industry simulators, including evaluation of parasitic effects and integration quality.
• Participate in cross-functional evaluation of key NAND features and collaborate with Product Engineering, Test, Probe, Process Integration, Assembly and other partner teams.
• Analyze design and silicon issues, drive root-cause analysis and implement robust corrective actions.
• Coordinate technical activities for a small team when required, including design reviews, execution tracking and knowledge sharing.
• Develop AI-assisted engineering flows and agent-based tools that automate or accelerate repetitive activities in analog design, simulation, data analysis, requirements handling, documentation and verification.
• Create reusable workflows that connect engineering data, scripts, simulation outputs and design checks, with appropriate validation and human review before decisions are made.
• Prototype and evaluate engineering agents for tasks such as simulation orchestration, layout automation, result summarization, specification-to-check extraction, schematic or connectivity review, debug assistance and report generation.
• Partner with circuit designers, verification engineers and software or AI specialists to identify high-value use cases and deploy maintainable solutions within approved engineering environments.
• Document AI flow architecture, assumptions, limitations, validation criteria and usage guidance so that solutions are traceable, reproducible and safe for engineering use.
• Continuously improve NAND die size, performance, power consumption, reliability, quality, cost and time-to-market.

Details

• Location: Hyderabad (Phoenix Aquila), India.