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System-verilog Questions Set 2:

Quiz Mode

What are the two types of Shift operators?

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Which of the following system tasks is used to suspend simulation for debugging purposes?

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In Verilog programming, which list in the module declaration corresponds to the parameter list in the C programming language?

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Given that $display is the main system task for displaying the values of variables or strings or expressions, the format specifier %h or %H displays the variable in _______________

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Which of the following components of a Verilog module must be present?

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module array();

bit [1:5][10:16] arr [21:27][31:38][31:0];

initial begin

$display("arr dimension = %0d", $dimensions(arr));

end

endmodule

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A floating gate transistor can be erased, or un-programmed, by exposing it to a strong UV light through a transparent plate on the top of the chip

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Given that $display is the main system task for displaying the values of variables or strings or expressions, the format specifier %c or %C displays the variable in _______________

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Given that $display is the main system task for displaying the values of variables or strings or expressions, the format specifier %o or %O displays the variable in octal format.

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What is the output of the following Verilog code?

module fork_join;

reg in1, in2;

initial begin

fork

#5 in1 = 1;

#10 in2 = 0;

join_none

$display("@%g came out of fork-join_none", $time);

#40 $finish;

end

endmodule

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