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Vhdl Questions Set 3:

Quiz Mode

What is the 'SLL' operator?

Shift Logic Left

Shift Logically

Shift Left Logical

Shift Left

Solution:

Which process produces circuits that are less prone to the latch-up effect?

CMOS

nMOS

pMOS

BiCMOS

Solution:

To avoid the latch-up effect, the BJT gain should be:

increased

decreased

changed randomly

maintained constant

Solution:

On which programming language is the VHDL (VHSIC Hardware Description Language) developed?

C Programming

ADA Programming Language

Assembly Language

PHP Language

Solution:

How can an assignment statement be used for sequential assignment in VHDL?

By using a delay mechanism

By using conditional statements

By using the WAIT keyword

By using it in a process block

Solution:

When is the sequential assignment statement activated?

When the waveform associated changes its value

When the process is terminated

When the execution is scheduled

When the value of the target is needed

Solution:

The process of transforming a design entry information of a circuit into a set of logic equations in any EDA (Electronic Design Automation) tool is known as

Simulation

Synthesis

Optimization

Verification

Solution:

What will be the values of the following variables after the MOD operations?

`x = 5 % 3; y = -5 % 3; z = 5 % -3;`

x = 2, y = -2 and z = -2

x = 2, y = 1 and z = -2

x = 2, y = -2 and z = 1

x = 2, y = -2 and z = 2

Solution:

What is the purpose of the Configuration statement in hardware design?

To complete the design process by adding libraries

To configure the components exactly as per the design

To add more than one entity into a single architecture

To add a component to any entity architecture pair

Solution:

With respect to the VHDL process statement, which of the following statements is true?

It is always required to declare some signals in the sensitivity list

Whenever one of the signals in the sensitivity list changes, the sequential statements in the process body are executed in sequence one at a time.

Whenever one of the signals in the sensitivity list changes, the sequential statements in the process body are not executed in sequence one at a time.

Whenever one of the signals in the sensitivity list changes, the sequential statements in the process body are executed in parallel (concurrently).

Vhdl Questions Set 3:

What is the 'SLL' operator?

Solution:

Which process produces circuits that are less prone to the latch-up effect?

Solution:

To avoid the latch-up effect, the BJT gain should be:

Solution:

On which programming language is the VHDL (VHSIC Hardware Description Language) developed?

Solution:

How can an assignment statement be used for sequential assignment in VHDL?

Solution:

When is the sequential assignment statement activated?

Solution:

The process of transforming a design entry information of a circuit into a set of logic equations in any EDA (Electronic Design Automation) tool is known as

Solution:

What will be the values of the following variables after the MOD operations?

`x = 5 % 3; y = -5 % 3; z = 5 % -3;`

Solution:

What is the purpose of the Configuration statement in hardware design?

Solution:

With respect to the VHDL process statement, which of the following statements is true?

Solution:

Related Question Sets:

Related Topics:

Vhdl Questions Set 3:

What is the 'SLL' operator?

Solution:

Which process produces circuits that are less prone to the latch-up effect?

Solution:

To avoid the latch-up effect, the BJT gain should be:

Solution:

On which programming language is the VHDL (VHSIC Hardware Description Language) developed?

Solution:

How can an assignment statement be used for sequential assignment in VHDL?

Solution:

When is the sequential assignment statement activated?

Solution:

The process of transforming a design entry information of a circuit into a set of logic equations in any EDA (Electronic Design Automation) tool is known as

Solution:

What will be the values of the following variables after the MOD operations? x = 5 % 3; y = -5 % 3; z = 5 % -3;

Solution:

What is the purpose of the Configuration statement in hardware design?

Solution:

With respect to the VHDL process statement, which of the following statements is true?

Solution:

Related Question Sets:

Related Topics:

What will be the values of the following variables after the MOD operations?

`x = 5 % 3; y = -5 % 3; z = 5 % -3;`