High Performance DSP core Implementation(Synthesis) Engineer

Overview

Qualcomm is hiring a High Performance DSP core Implementation (Synthesis) Engineer to define, implement, verify, validate, and document ASIC/IP development for high-performance, low-power products.

What you'll do

• Define, model, design, optimize, verify, validate, implement, and document ASIC/IP development.
• Collaborate cross-functionally to determine product execution path.
• Perform physical synthesis and synthesis methodologies work.
• Write timing constraints and support STA for timing closure and pipelining.
• Handle multi-clock domain timing closure and MCMM synthesis/optimization.
• Support low-power implementation using UPF and power optimization flows such as clock gating.
• Work with design/DFT/PD teams for netlist delivery, timing constraint validation, ECO handling, and formal verification.

What you'll need

• Bachelor’s degree in Science, Engineering, or related field.
• 2+ years of hands-on experience in Synthesis and LEC.
• Strong understanding of physical synthesis and synthesis methodologies with industry-standard tools.
• Experience with writing timing constraints, STA, timing closure, and pipelining.
• Familiarity with MCMM synthesis and optimization.
• Good understanding of low-power design implementation using UPF.
• Scripting experience using Perl/Python and TCL.

Details

• Location: Noida, Uttar Pradesh, India.