IO and Mixed Signal Layout Design Engineer

Overview

Design full custom I/O library layouts and analog mixed-signal IP layouts across planar and FinFET technologies, with ownership from end-to-end deliverables.

What you'll do

• Design full custom layouts of I/O libraries and analog mixed-signal IPs.
• Drive floor-planning decisions to ensure optimal placement and routing.
• Perform comprehensive layout verification for quality and compliance.
• Ensure end-to-end deliverables are completed with quality within the schedule.
• Adapt to new methodologies and communicate effectively with teams across sites.

What you'll need

• B.Tech/M.Tech in Electronics/Electrical engineering with 8–12 years of experience.
• Hands-on experience in I/O library and analog mixed-signal IP development and verification.
• Solid understanding of planar and FinFET layouts and process technology.
• Experience with Cadence Virtuoso Layout suite and Siemens CALIBRE verification tools.
• Expertise in layout verifications and debugging including DRC/LVS/ANT/ERC/DFM.
• Knowledge of physical design flow including LEF generation and PnR.