Peripherals Design Verification -Sr Engineer

Overview

Senior ASIC engineer role in Qualcomm's Engineering Group, focused on design verification of peripheral IP at unit and IP level.

What you'll do

• Define, model, design, optimize, verify, validate, implement and document IP (block/SoC) development for high performance, low power products.
• Collaborate with cross-functional groups to determine product execution path.

What you'll need

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience, OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience, OR PhD in Science, Engineering, or related field.
• 3+ years' experience in unit and IP level verification.
• Experience with coverage driven constraint random verification.
• Knowledge of standard protocols such as PCIe, CXL, USB, Ethernet.
• Strong in System Verilog and UVM.
• Test planning.
• Sound experience in testbench (stimulus, agent, monitor, checker) development.
• Experience in verification having C-based reference model inside the testbench.
• Exposure in scripting (Perl, Python).

Details

• Location: Bangalore, India.