Senior Engineer ,DPG LPDDR Verification

Overview

Lead verification for sophisticated full-chip gate-level custom memory designs, including LPDDR and related DRAM architectures. The role covers pre-silicon simulation, debugging, coverage improvement, and verification-flow development.

What you'll do

• Guide verification efforts within assigned areas of expertise.
• Simulate, analyze, and debug pre-silicon full-chip designs.
• Develop test cases and stimulus to increase functional coverage.
• Develop verification methodologies and environments.
• Build and maintain test benches and test vectors.
• Run regressions for coverage analysis and improvement.
• Identify verification tasks suitable for AI-based automation.

What you'll need

• Experience in DRAM, SRAM, or other memory-related fields.
• Exposure to gate-level simulations with delays.
• Knowledge of logic schematic analysis.
• Proficiency with SPICE and Verilog simulations.
• Experience with Python scripting.
• Experience in setup/hold and critical data-path timing analysis.
• Bachelor's or postgraduate degree in Electronics Engineering or a related engineering field.

Nice to have

• Experience using AI-assisted tools to improve verification productivity.
• Ability to collaborate on scalable AI-based verification solutions.

Details

• Location: Hyderabad, India.