Senior Memory Systems Design Engineer

Overview

Senior Memory Systems Design Engineer focused on next-generation NAND Flash storage system design, FPGA implementation, and validation.

What you'll do

• Lead FPGA design and optimization on Xilinx FPGAs (Zynq, UltraScale+, Versal).
• Develop RTL logic in VHDL/Verilog with timing-critical performance targets.
• Architect and integrate FPGA IP cores and interfaces (PCIe, AXI4, DDR memory controllers, high-speed serial).
• Develop embedded firmware for Zynq SoCs and FPGA-CPU interfaces, including drivers and low-level firmware.
• Run FPGA verification and validation with test plans and debug tools (ChipScope, ILA).
• Perform signal integrity analysis and timing closure, and troubleshoot hardware-software integration.

What you'll need

• 7-10 years of proven experience in FPGA design, RTL development, and embedded systems.
• Extensive hands-on experience with Xilinx FPGA platforms including Zynq-7000 and Zynq UltraScale+.
• Vivado Design Suite, including IP Integrator and block design methodologies.
• Strong RTL coding skills using VHDL/Verilog.
• Embedded firmware development experience with C/C++ for ARM Cortex processors.
• System-level debug and validation expertise with industry-standard tools.
• Experience with high-speed interfaces (PCIe, DDR3/4 and NAND Flash).

Nice to have

• Machine learning principles and implementation on FPGA platforms.
• Experience with other FPGA vendors (Intel/Altera, Microsemi, Lattice).
• Knowledge of AI acceleration frameworks and neural network deployment.
• Familiarity with high-level synthesis (HLS) for ML workloads.

Details

• Location: Bengaluru, KA, India.