Staff Engineer Design

Overview

Staff Engineer Design role focused on developing and implementing digital design flows for synthesis, LEC and CLP runs and physical design, driving SoC synthesis, UPF, physical design and top-level timing closure.

What you'll do

• Develop and implement innovative digital design flows, focusing on synthesis, LEC and CLP runs and physical design aspects.
• Translate high-level design requirements into detailed flow specifications, utilizing state-of-the-art EDA tools and flows to ensure efficient timing closure and physical sign-off.
• Work independently across various phases of the RTL2GDS flow, with a focus on synthesis, equivalence checking and physical implementation, to ensure highly automated, safe, stable, easy-to-use, customizable and effective digital design flows.
• Participate in an expert network to drive innovation, methodology and flow topics in SoC synthesis, UPF, physical design and top-level timing closure, contributing to the development of next-generation SoC designs.

What you'll need

• A degree in Electrical Engineering, Microelectronics, or a similar field.
• At least 5-8 years of working experience in Synthesis and Physical Design handling highly complex SoCs, with sound experience in Synthesis, LEC and UPF/CLP Timing Closure.
• Very good knowledge in Synopsys and Cadence toolset in the RTL2GDS domain.
• Proven track record in developing digital design methodologies.
• Know-how in technical leadership in physical design projects.
• Sound programming skills and knowledge in scripting languages like Tcl or Python.
• Basic experience in RTL coding.
• Understanding of Functional Safety and Agile development methods like Kanban, Scrum or XP.
• Excellent written and spoken English.

Nice to have

• Test Driven Development knowledge.