Staff STA Engineer

Overview

Lead and own Synthesis and STA for complex high performance ICs with large digital and analog interfaces, influencing implementation, guiding methodology improvements, and leading small technical teams.

What you'll do

• Perform digital synthesis of high performance digital blocks.
• Develop, analyze, validate and debug timing constraints.
• Carry out RTL to netlist flow, logical equivalence checks and debug failures.
• Set up STA flow, drive convergence, conduct reviews and optimize the flow.
• Perform timing, noise and DRC (transition, capacitance) signoff for multi-mode, multi-corner designs.
• Automate flows using TCL/Perl/Python.
• Support floor-planning, placement, CTS, routing, extraction, physical verification, EM/IR flows and signoff checks.

What you'll need

• Hands-on experience in digital synthesis, DFT insertion, check design and check timing analysis.
• Good understanding of all aspects of liberty models, including power.
• Ability to develop complex timing constraints by working with designers.
• Experience in IP/subsystem/full-chip timing constraints.
• Knowledge of commands and constructs supported across synthesis, STA, LEC and PD tools.
• Analysis skills to root cause timing violations and suggest solutions across design stages.
• Hands-on experience with STA and signoff of complex high speed SoC designs in 16nm and below process technologies.
• Strong expertise in timing ECOs, both tool-driven and manual, for timing closure.
• Sound understanding of scan/DFT modes and timing.
• Experience in leakage and dynamic power optimization of logic as part of synthesis.
• Synthesis/STA experience on 4+ successful tapeouts at lower geometries.
• Familiarity with digital flow design aspects from RTL to GDS.
• Proficiency in TCL/Perl/Python scripts and automation on timing analysis tools.
• Flow enhancements to resolve timing and/or timing-DRC issues.
• Good communication skills in a cross-collaborative environment.
• Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
• 6-12 years of relevant experience.

Nice to have

• Hands-on experience in floor-planning, placement, CTS, routing using physical design tools, extraction, physical verification, EM/IR flows and signoff checks.

Details

• Location: Bangalore, RMZ, India.
• Job type: Experienced; 1st shift/days.
• Required travel: Yes, 10% of the time.