Synthesis Engineer, Principal

Overview

Principal Synthesis Engineer focused on physical synthesis, timing closure, and performance/lower-power optimization for hardware designs.

What you'll do

• Apply physical synthesis and synthesis methodologies using industry-standard tools.
• Write timing constraints for synthesis and STA, supporting timing closure and pipelining across levels.
• Handle timing closure for multi-clock domain designs.
• Work on MCMM synthesis and optimization.
• Implement low-power design using UPF and power optimization flows like clock gating.
• Coordinate with design, DFT, and PD teams for netlist delivery and timing constraint validation.

What you'll need

• 15+ years experience (as stated).
• Strong in-depth knowledge of physical synthesis and synthesis methodologies.
• Experience in timing constraints, STA, timing closure, and pipelining.
• Familiarity with MCMM synthesis and optimization.
• Good understanding of low-power design using UPF.
• Programming/scripting experience with Perl, Python, and TCL.
• Experience handling ECOs and formal verification while maintaining high quality metrics.

Details

• Location listed as Bangalore, India.