Verification Engineer, Memory Subsystem

Overview

Verification Engineer for NVIDIA’s Memory Subsystem, responsible for verifying ASIC design, architecture, and micro-architecture using advanced verification methodologies.

What you'll do

• Verify ASIC design/architecture/micro-architecture using advanced verification methodologies.
• Define verification scope and build verification infrastructure to confirm design correctness.
• Create test plans, tests, and verification infrastructure for complex IPs/sub-systems.
• Perform performance and deadlock verification for the GPU memory subsystem unit.
• Build reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven methodology.
• Complete functional coverage-driven verification closure and coordinate with related verification teams.

What you'll need

• Have B.Tech./M.Tech. with 1+ years of relevant experience.
• Have verification experience for complex IPs/units and sub-systems.
• Use random stimulus with functional coverage and assertion-based verification.
• Know Verilog.
• Have knowledge in SystemVerilog or similar HVL.
• Be familiar with UVM/VMM and industry-standard verification tools for simulation and debug.

Nice to have

• Experience in memory subsystem or network interconnect IP verification.
• Good debugging and analytical skills.
• Scripting knowledge (Python/Perl/shell).
• Good communication skills and teamwork interest.

Details

• Work mode: Hybrid (#LI-Hybrid).