Custom CPU Physical Design Engineer (Lead/Staff/Sr Staff)

Overview

Lead/Staff/Sr Staff Custom CPU Physical Design Engineer roles focused on physical design and timing signoff for high-speed cores.

What you'll do

• Plan, design, optimize, verify, and test electronic systems.
• Perform physical design and timing signoff for high speed cores.
• Handle RTL to GDSII implementation work independently.
• Collaborate to resolve issues related to constraints validation, verification, STA, and physical design.
• Lead block-level or chip-level physical design, STA, and PDN activities.
• Use low power flow approaches such as power gating, multi-Vt flow, and power supply management.

What you'll need

• Minimum 2+ years hardware engineering experience with a Bachelor's degree, or 1+ year with a Master's degree, or PhD in a relevant field.
• Experience in physical design and timing signoff for high speed cores (5 to 16 years stated).
• Exposure to high frequency design convergence with PPA targets and PDN methodology.
• Experience in leading block level or chip level physical design, STA, and PDN activities.
• Knowledge of low power flow (power gating, multi-Vt flow, power supply management).
• Scripting knowledge using Tcl/Perl.
• Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM).

Details

• Location: Bangalore, India.