Staff Design Verification Engineer Jobs

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Staff Engineer, Design Verification Engineering

New

Analog Devices, Inc.Bangalore · Onsite7+ YearsApply on their site

SystemverilogUVMMixed-Signal Verification+1

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ASIC Design Verification Engineer || Verilog, UVM, Testbench | Simulation || Exp 7+ years

New

CiscoBangalore · Onsite7+ YearsApply on their site

VerilogVerification PlanningCoverage Modeling+1

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SoC Design Verification Engineer

IntelBangalore · Hybrid6+ YearsApply on their site

UVMDebuggingVerification Planning+1

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Video IP Design Verification Engineer

QualcommBangalore · Onsite3 - 13 YearsApply on their site

SystemverilogUVMcoverage driven verification+1

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RTL Design Verification (NOC)- Engineer

New

QualcommBangalore · Onsite1+ YearsApply on their site

Digital LogicVerilogDebuggingHardware Design

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ASIC Design Verification Engineer

Hewlett Packard EnterpriseBengaluru · Onsite5+ YearsApply on their site

SystemverilogUVMVerification Planning+1

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Digital Design Verification Engineer

AlteraIași · Remote0 - 5 YearsApply on their site

SystemverilogCI/CDSystem Verification+1

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Design Verification Engineer

BroadcomOnsite12+ YearsApply on their site

UVM VerificationSystemverilog+2

$143.8K - $230K /year

SALARY

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