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Digital-electronics Questions Set 107:

Quiz Mode

A SCR (Silicon Controlled Rectifier) is a?

Device with 3 junctions

Device with 2 junctions

Device with 1 junction

Device with 4 junctions

Solution:

A full-adder has Cin=1. What are the sum (∑) and the output carry (Cout) when A=1 and B=1?

∑=1, Cout=0

∑=1, Cout=1

∑=0, Cout=0

∑=0, Cout=1

Solution:

Which of the following logic gates are required to design a Decoder?

AND gates and Buffers

AND gates and Inverters

OR gates and AND gates

OR gates, Inverters, and AND gates

Solution:

A multistage amplifier employs five stages, each of which has a power gain of 30. What is the total gain of the amplifier in decibels (dB)?

7.385 dB

0.7385 dB

73.85 dB

738.5 dB

Solution:

What is the unit of the frequency 'f' obtained after an analog signal is sampled in an analog-to-digital converter (ADC)?

hertz

hertz per sample

dimensionless

radians per sample

Solution:

Which of the following statements about FPGAs are true?

Both 1 and 3

1, 2 and 3

They are Application Specific Integrated Circuits (ASICs)

They can behave as any Digital System

They can execute code

Solution:

What is used in place of truth table while working with sequential circuits?

k-map

state diagram

state table

Moore's machine

Solution:

Which of the following statements is NOT correct?

A multiplexer has several data inputs and a single output

Logic functions can be implemented using multiplexers

Two 8 to 1 multiplexers can be cascaded to obtain one 16 to 1 multiplexers

Multiplexers cannot have open-collector outputs

Solution:

Which of the following statements is true about 'repetition code'?

An extra bit is added to a string of data bits to detect an error

Makes use of repetitive transmission of each data bit in the bit stream

Provides a reasonably high level of protection at low redundancy

None of the above

Solution:

A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is 1.2 microseconds. A 4-bit ripple-carry binary adder is implemented by using 4 full adders. The total propagation time of this 4-bit binary adder in microseconds is:

20.2

19.2

18.2

17.2

Digital-electronics Questions Set 107:

A SCR (Silicon Controlled Rectifier) is a?

Solution:

A full-adder has Cin=1. What are the sum (∑) and the output carry (Cout) when A=1 and B=1?

Solution:

Which of the following logic gates are required to design a Decoder?

Solution:

A multistage amplifier employs five stages, each of which has a power gain of 30. What is the total gain of the amplifier in decibels (dB)?

Solution:

What is the unit of the frequency 'f' obtained after an analog signal is sampled in an analog-to-digital converter (ADC)?

Solution:

Which of the following statements about FPGAs are true?

Solution:

What is used in place of truth table while working with sequential circuits?

Solution:

Which of the following statements is NOT correct?

Solution:

Which of the following statements is true about 'repetition code'?

Solution:

Solution:

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