A SCR (Silicon Controlled Rectifier) is a?

A full-adder has Cin=1. What are the sum (∑) and the output carry (Cout) when A=1 and B=1?

Which of the following logic gates are required to design a Decoder?

A multistage amplifier employs five stages, each of which has a power gain of 30. What is the total gain of the amplifier in decibels (dB)?

What is the unit of the frequency 'f' obtained after an analog signal is sampled in an analog-to-digital converter (ADC)?

Which of the following statements about FPGAs are true?

What is used in place of truth table while working with sequential circuits?

Which of the following statements is NOT correct?

Which of the following statements is true about 'repetition code'?

A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is 1.2 microseconds. A 4-bit ripple-carry binary adder is implemented by using 4 full adders. The total propagation time of this 4-bit binary adder in microseconds is: