Abekus — AI learning and job matching platform logo
LearnCareersCompeteEmployerResume

Central Processing Unit Register Transfer Level Design Manager Jobs

Intel hiring on Abekus

CPU RTL Design Manager

New
IntelBangalore · Hybrid15+ YearsApply on their site
RTL DesignDesign Verification+2
View detailsPosted today
View details
NXP Semiconductors hiring on Abekus

Design Engineer, Digital IP

NXP SemiconductorsBangalore · Onsite2+ YearsApply on their site
VerilogDebuggingsimulationPython
View detailsPosted this week
View details
G

PMTS ASIC Digital Design IP ENGINEERING

GlobalFoundries Inc.Hyderabad · Onsite12+ YearsApply on their site
Processor DesignMicroarchitectureVerilog+1
View detailsPosted 2 weeks ago
View details
Micron Technology hiring on Abekus

Digital Design Engineer, DMTS/SMTS/MTS

Micron TechnologyHyderabad · Onsite10+ YearsApply on their site
Timing ClosureVerilogClock Domain Crossing+1
View detailsPosted 3 weeks ago
View details
Altera hiring on Abekus

IP Logic Design Engineer

AlteraBengaluru · Onsite10+ YearsApply on their site
Timing ClosureVerilogClock Domain Crossing+1
View detailsPosted a month ago
View details
A

Lead Logic Design - PCIE IP/Subsystem Engineer

Astera Labs, Inc.Bengaluru · Onsite6 - 10 YearsApply on their site
RTL DesignPCIe ArchitectureVerilog+1
View detailsPosted a month ago
View details
Qualcomm hiring on Abekus

RTL Design (SOC) Engineer-Principal/Manager

New
QualcommBangalore · Onsite8+ YearsApply on their site
RTL DesignVerilogSystem Design+1
View detailsPosted today
View details
Qualcomm hiring on Abekus

ASIC RTL Design Engineer (Sr. Engr / Sr. Lead Engr)

New
QualcommBangalore · OnsiteAny experienceApply on their site
VerilogClock Domain CrossingLow power design+1
View detailsPosted today
View details
Intel hiring on Abekus

IP RTL Senior Design Engineer

IntelBangalore · Onsite8+ YearsApply on their site
Timing ClosureObservabilityVerilog+1
View detailsPosted 1 week ago
View details
NXP Semiconductors hiring on Abekus

Digital IP Design - Senior Lead Engineer

NXP SemiconductorsNoida · Onsite7 - 13 YearsApply on their site
VerilogProtocol DesignTiming Closure+1
View detailsPosted 2 weeks ago
View details
  • 1
  • 2
  • ...
  • 113

Browse Roles

  • Central Processing Unit Register Transfer Level Design Manager1
  • Register Transfer Level Design Engineer1
  • Digital Design Engineer10
  • Logic Design Engineer4
  • Senior Digital Design Engineer4
  • RTL Design Engineer1
  • Electrical Design Engineer30
  • Senior Logic Design Engineer2
  • Principal Logic Design Engineer2
  • Senior Field-Programmable Gate Array Design Engineer1

Browse by Location

  • Remote5399
  • India14355
  • Karnataka6192
  • Bangalore6158
  • Maharashtra3103
  • United States2171
Pune
1725
  • Telangana1699
  • Hyderabad1695
  • Mumbai1263
  • Haryana1060